EPIC Architecture Data Flow Processors and their Execution |
Danijela Jakimovska, Aristotel Tentov, Goran Jakimovski, Sashka Gjorgjievska and Maja Malenko The Faculty of Electrical Engineering and Information Technologies Dept. of Computer Science and Engineering, Karposh 2, Skopje Republic of Macedonia |
Abstract: The complexity of modern processors and the constant competition between different computer technologies led to the development of many different computer architectures, all with their pros and cons, but all with the same goal: to improve the overall performance of the computer systems. In this paper, we’ll look at the following computer architectures: RISC architecture, CISC architecture, Superscalar architecture, VLIW architecture, EPIC architecture, and Data flow processor architectures. All of these architectures have their pros and cons. We’ll also look at the advantages and disadvantages of each of them. We’ll also briefly explain the idea of parallelizing instructions’ execution, so that we can focus on the goal of executing more than 1 instruction in one clock cycle to improve the overall system performance. Let’s take a look at some commercial implementations of modern computer architectures. |
Keywords: Processor Architectures, RISC, CISC, ILP EPIC Architecture Data Flow Processors and their Execution |
DOI:https://doi.org/10.6025/jio/2023/13/4/112-117 |
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References: [1] Hennessy, John L., Patterson, David A. (2007). Computer Architecture: A Quantitative Approach. |