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Progress in Systems and Telecommunication Engineering
 

Bivalent logic in Xfault simulators
Pavlinka Radoyska and Kamen Fillyov
College of Energetic and Electronics at Technical University of Sofia 8 Kl. Ohridski Blvd Sofia 1000, Bulgaria
Abstract: We have introduced the concurrent X fault simulator in this work. It is found that many issues are identified with the fault nature of X fault model and rules. The main issue is the problem of using bivalent logic for bad gates. We have fixed this issue by the use of trivalent logic and bit presentation. Another issue is the particular fault propagation rules based one. One more issue is that Xfault version generation. We have solved the issue by a set of using a sub-gate for every bad gate. We have solved the issue of Xfault source line presentation with the use of binary arrays for source lines description.
Keywords: X-fault Model, VLSI Fault Simulator, Concurrent Fault simulation, Algorithm, Bivalent Logic, Trivalent Logic, Bitwise operations Bivalent logic in Xfault simulators
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References:

[1] Huisman, L.(2004). Diagnosing Arbitrary Defects in Logic Designs Using Single Location at A Time (SLAT), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 1, 2004, pp. 91–101
[2] Wen, X., Miyoshi, T., Kajiihara, S., Wang, L., Saluja, K., Kinoshita, K. (2004). On per-test fault diagnosis using the Xfault model. In Int’l Conf. on CAD, 2004, pp. 633–640.
[3] Polian, I., Miyase, K., Nakamura, Y. , Kajihara, S., Engelke, P., Becker, B., Spinner, S., Wen, X. (2008). Diagnosis of Realistic Defects Based on the X-Fault Model, 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2008., pp.1-4
[4] Zhang, Y., Guan, Y., Wang G.(2009). Analysis and Comparison of Fault Simulation, International Symposium on Intelligent Ubiquitous Computing and Education, 2009, pp. 503 – 506
[5] Shen, Li, (2003). RTL Concurrent Fault Simulation, Proceedings of the 12th Asian Test Symposium
[6] Lu, W., M. Radetzki (2011). Efficient Fault Simulation of SystemC Designs, 14th Euromicro Conference on Digital System Design, IEEE, Computer Society, pp. 487-494
[7] Bosio, A., G. Natale (2008). LIFTING: a Flexible Open-Source Fault Simulator, 17th Asian Test Symposium, pp. 36 – 40
[8] Ubar, R., Devadze, S., Raik, J., Jutman, A. (2010). Parallel Xfault simulation with critical path tracing technique, Proceedings of the Conference on Design, Automation and Test in Europe DATE '10, pp. 879-884


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