3D Image synthesis framework for HW\SW Partioning: Case study
Manel Hentati, Raida Hentati, Yassine Aoudni, Mohamed Abid
International Journal of Information Studies, Vol. 3, No. 2, 2000.
DOI: 
Link: https://www.dline.info/ijis/fulltext/v3n2/ijisv3n2_1.pdf
Abstract:
In the current eral of technology development and the evolution of multimedia application, the design of a
system on chip becomes more and more complex. Indeed, the application must answer contradictory constrains. And
integrate new functionalities that require high performance architectures. In this paper we propose a new framework for
hardware/software implementation on reconfigurable multimedia system on chip. Firstly we present a new methodology
for HW/SW partitioning of the application based on two steps. The first one uses the profiling and the second one uses the
design trotter tools. Next we implement this code in the reconfigurable platform. The target architecture is a virtex5 FPGA.
The validation of our approach is made through 3D image synthesis. Finally we illustrate the experimental results.