@article{2028,
  author = {S. Nirmal Raj, S. Ashok, P. Bala Vengateswarlu, G.Vishnu Vardhan Rao},
  title = {A Low Power and High Speed Pipeline Architecture using adaptive Median Filter for Noise Reduction in image Processing},
  journal = {Journal of Electronic Systems},
  year = {2016},
  volume = {6},
  number = {2},
  doi = {},
  url = {},
  abstract = {Low level data processing purposes are like FIR filtering, recognition of patterns or correlation, whereas the
parallel implementation is upheld bythe design matched distinct intention arithmetic; elevated throughput FPGA routes
facilely output waveform even for the most advanced DSP processors. In this paper the examination of a high-speed non-linear
Adaptive median filter implementation is presented. Next the Adaptive Median Filter solves the dual intention of removing the
impulse noise from the image and cutting to distortion in the image. Adaptive Median Filtering can be accomplish the filtering
procedure of an image corrupted alongside impulse noise.},
}