Bivalent logic in Xfault simulators
Pavlinka Radoyska and Kamen Fillyov
Progress in Signals and Telecommunication Engineering, Vol. 11, No. 2, 2022.
DOI: 
Link: https://www.dline.info/pste/fulltext/v11n2/pstev11n2_3.pdf
Abstract:
We have introduced the concurrent X fault simulator in this work. It is found that many issues are identified with the fault nature of X fault model and rules. The main issue is the problem of using bivalent logic for bad gates. We have fixed this issue by the use of trivalent logic and bit presentation. Another issue is the particular fault propagation rules based one. One more issue is that Xfault version generation. We have solved the issue by a set of using a sub-gate for every bad gate. We have solved the issue of Xfault source line presentation with the use of binary arrays for source lines description.