Abstract In the software development process, developers feel the gap when moving from requirement engineering phase (using scenario-based approach) to construction phase; this is due to that models result in RE cannot be easily mapped to models in construction phase. This paper discusses this problem, and offers a new approach that handles this issue so that developers feel no break during... In the software development process, developers feel the gap when moving from requirement engineering phase (using scenario-based approach) to construction phase; this is due to that models result in RE cannot be easily mapped to models in construction phase. This paper discusses this problem, and offers a new approach that handles this issue so that developers feel no break during all software development activities from RE to coding and testing. Read More Read Less

Abstract This paper addresses a synthesis process of VHDL code for FPGA design flow using Xilinx PlanAhead tool. This tool provide a low power profile, more hard IP functionality, create a global timing constraint, lower node capacitance & architectural innovations, cost of development, very high DSP performance hardware solutions and easily can be evolutionary algorithms, reconfigured to the development of whole... This paper addresses a synthesis process of VHDL code for FPGA design flow using Xilinx PlanAhead tool. This tool provide a low power profile, more hard IP functionality, create a global timing constraint, lower node capacitance & architectural innovations, cost of development, very high DSP performance hardware solutions and easily can be evolutionary algorithms, reconfigured to the development of whole compiler, simulation and synthesis frameworks. It is handle dense logic and memory elements offering very high logic capacity. The logic blocks are replicated in FPGA with interconnects and input-output blocks. This approach attached a new created VHDL code and generate of register-transfer level (RTL) hardware description language (HDL). In this paper, we have presented the FPGA approach of interconnection and its flexibility on example through synthesis process, simulations and implemented results are detailed. Read More Read Less

Abstract The field of Wireless Sensor Networks (WSN) is undergoing a major revolution, opening the prospect significant impact in many application areas (safety, health, environment, food safety, manufacturing, telecommunications. Routing is fundamental such a network because there is no infrastructure that manages the information exchanged between network nodes.Two major classes of routing algorithms are defined, the first is the class flat... The field of Wireless Sensor Networks (WSN) is undergoing a major revolution, opening the prospect significant impact in many application areas (safety, health, environment, food safety, manufacturing, telecommunications. Routing is fundamental such a network because there is no infrastructure that manages the information exchanged between network nodes.Two major classes of routing algorithms are defined, the first is the class flat and the second is that of the hierarchical algorithms. The aim of this paper is to study the class of flat and make a comparative study between several routing algorithms and their impact on the performance of WSN.Our simulation is performed in NS2 (Network Simulator 2). It allows us to identify performance metrics such asthroughput, end to end delay and loss rate. Read More Read Less

Abstract In this paper, we present Roman Tutor, an intelligent tutoring simulator to train astronauts on manipulating the SSRMS, an articulated robot arm deployed on the International Space Station. Roman Tutor incorporates a model of the system operations curriculum, a kinematic simulation of the robotics equipment and the ISS, a high performance path planner and an automatic task demonstration generator. For... In this paper, we present Roman Tutor, an intelligent tutoring simulator to train astronauts on manipulating the SSRMS, an articulated robot arm deployed on the International Space Station. Roman Tutor incorporates a model of the system operations curriculum, a kinematic simulation of the robotics equipment and the ISS, a high performance path planner and an automatic task demonstration generator. For each element of the curriculum that the student is supposed to master, Roman Tutor generates example tasks for the student to accomplish within the simulation environment and monitors its progression to provide relevant feedback when needed. Although motivated by the SSRMS application, Roman Tutor remains applicable to any telerobotics system application. Read More Read Less