Home| Contact Us| New Journals| Browse Journals| Journal Prices| For Authors|

Print ISSN:
Online ISSN:


  About JISM
  DLINE Portal Home
Home
Aims & Scope
Editorial Board
Current Issue
Next Issue
Previous Issue
Sample Issue
Upcoming Conferences
Self-archiving policy
Alert Services
Be a Reviewer
Publisher
Paper Submission
Subscription
Contact us
 
  How To Order
  Order Online
Price Information
Request for Complimentary
Print Copy
 
  For Authors
  Guidelines for Contributors
Online Submission
Call for Papers
Author Rights
 
 
RELATED JOURNALS
Journal of Digital Information Management (JDIM)
Journal of Multimedia Processing and Technologies (JMPT)
International Journal of Web Application (IJWA)

 

 
Journal of Electronic Systems
 

Design of the Controlled Buck Converter for Wearable Electronic Devices
Tihomir Brusev, Georgi Kunov, Elissaveta Gadjeva
Technical University of Sofia Kl. Ohridski 8, 1797 Sofia Bulgaria
Abstract: In the current work, we have formulated a controlled buck convertor based on integrated Pulse-Width Modulation (PWM) and Pulse-Frequency Modulation (PFM). This is developed for wearable electronic devices. The input voltage is equal to 3.6V and the average value of the output voltage is regulated to be 1.7V. The maximum efficiency h of the buck converter is 81.43%, when the load current ILoad is equal to 68mA. When ILoad is smaller than 8mA the efficiency of the PFM controlled buck converter is around 7% higher compared to the efficiency of the PWM controlled buck converter.
Keywords: Buck converters, Pulse-Width Modulation (PWM), Pulse-Frequency Modulation (PFM), Integrated Circuits, Cadence Design of the Controlled Buck Converter for Wearable Electronic Devices
DOI:https://doi.org/10.6025/jes/2020/10/4/138-146
Full_Text   PDF 676 KB   Download:   226  times
References:

[1] Cheng, C., Lin, L., Lin, J., Chen, K., Lin, Y., Lin, J. R., Tsai, T. (2017). A DVS-Based Burst Mode with Automatic Entrance Point Control Technique in DC-DC Boost Converter for Wearable Devices and IoT Applications, 2017 IEEE Asian Solid- State Circuits Conference (A-SSCC), Seoul, 2017, p 121-124.
[2] Paidimarri, A., Chandrakasan, A. P. (2017). A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power, IEEE Journal of Solid-State Circuits, 52 (12), p 3119-3131, December 2017.
[3] Shafiee, N., Tewari, S., Calhoun, B., Shrivastava, A. (2017). Infrastructure Circuits for Lifetime Improvement of Ultra-Low Power IoT Devices, IEEE Transactions on Circuits and Systems I: Regular Papers, 64 (9), p 2598-2610, September 2017.
[4] Roy, A., Klinefelter, A., Yahya, F. B., Chen, X., Gonzalez- Guerrero, L. P., Lukas, C. J., Kamakshi, D. A., Boley, J., Craing K., Faisal, M., Oh, S., Roberts, N. E., Shakhsheer, Y., Shrivastava, A., Vasudevan, D. P., Wentzloff, D. D., Calhoun, B. H. (2015). A 6.45 μW Self-Powered SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems, IEEE Trans. Biomed. Circuits Syst., 9(6), p 862-874, December 2015.a
[5] Park, Y. J., Park, J. H., Kim, H. J., Ryu, H., Kim, S. Y. (2017). A Design of a 92.4% Efficiency Triple Mode Control DC–DC Buck Converter With Low Power Retention Mode and Adaptive Zero Current Detector for IoT/Wearable Applications, IEEE Transactions on Power Electronics, 32 (9), p 6946-6960, September 2017.
[6] Spasova, M., Nikolov, D., Angelov, G., Radonov, R., Hristov, N. (2017). SRAM Design Based on Carbon Nanotube Field Effect Transistor’s Model with Modified Parameters, 2017 40th International Spring Seminar on Electronics Technology (ISSE), p 1-4, 2017, Bulgaria.
[7] Virtuoso Analog Design Environment, www.cadence.com.


Home | Aim & Scope | Editorial Board | Author Guidelines | Publisher | Subscription | Previous Issue | Contact Us |Upcoming Conferences|Sample Issues|Library Recommendation Form|

 

Copyright © 2011 dline.info