Progress in Machines and Systems

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Progress in Machines and Systems

Digital Signal Processing (DSP) Platforms for Embedded IoT Applications

Nikola Rendevski, Darko Pajkovski, Zoran Kotevski, Ilija Hristoski, Ramona Markoska
Faculty of Information and Communication Technologies Ã¢â‚¬Å“St. Kliment Ohridski UniversityÃ¢â‚¬Â Ã¢â‚¬â€œ Bitola Republic of Macedonia

Abstract: In this work, we present a digital design of compact Field Programmable Gate Array (FPGA) - based architecture for real-time edge detection. At this point, we are focused on pure hardware realizations of filtering and edge detection algorithms as widely used techniques for various industrial and entertainment applications. The advantage of FPGAs as digital signal processing (DSP) platforms for real-time video and image processing lays mainly in their reconfigurable and re-usable structure, capable to efficiently exploit spatial and temporal parallelism. Based on the results of the digital FPGA synthesis of pipelined Sobel edge detection architecture, we discuss on the potential and challenges towards design of low-complex pure hardware-based video processing devices for embedded IoT applications.

Keywords: FPGA, Edge Detection, Sobel Algorithm, IoT Digital Signal Processing (DSP) Platforms for Embedded IoT Applications

DOI:https://doi.org/10.6025/pms/2021/10/2/55-61

Full_Text PDF 657 KB Download: 203 times

References:

[1] Burger, Wilhelm, Mark James Burge, Mark James Burge, and Mark James Burge. Principles of digital image processing.
London: Springer, 2009.
[2] OV760/761 Camera Module Specification. https://www.voti.nl/docs/OV7670.pdf (Accessed April 10, 2018)
[3] Gradient Filter Implementation on FPGA, Online Article. https://www.element14.com/community/groups/fpgagroup/blog/
2015/05/27/gradient-filter-implementation-on-fpgapart2-first-modules. (Accessed April 12, 2018)
[4] A. Ben Amara, E. Pissaloux and M. Atri, “Sobel edge detection system design and integration on an FPGA based HD video streaming architecture, 2016 11th International Design & Test Symposium (IDT), Hammamet, 2016, 160-164.
[5] DE1-SoC FPGA Board Specifications: https://www.altera.com/solutions/partners/partnerprofile/terasic-inc-/board/de1-soc-board.html. (Accessed April12, 2018)

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